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[/] [xulalx25soc/] [trunk/] [sw/] - Rev 113

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113 Lots of updates, mostly focused on getting the XuLA board and CPU able to pass
a comprehensive test suite. At this point, everything passes and logic usage
is down even. Among the few changes includes the "break" bit in the uCC
register, used to indicate a switch to supervisor mode occurred as a result
of a user break, and the ability for the supervisor to clear the instruction
cache.
dgisselq 2893d 05h /xulalx25soc/trunk/sw/
111 Added some debug support programs to the repository. dgisselq 2901d 04h /xulalx25soc/trunk/sw/
110 Fixed a problem whereby block RAM would be declared as a bus error on the
stack, even if the data was valid.
dgisselq 2901d 09h /xulalx25soc/trunk/sw/
109 This continues the updates to the wishbone-uart conversion. It fixes several
bugs within wbuexec, and pipelines the compression scheme. Further, the
read codeword was adjusted so that a read of 8 can be requested with six-bits,
rather than requiring 12. Likewise, the dependence upon the read of 8 on
incrementing the address pointer has been removed. All told, the design
builds for a 200MHz Artix-7, and it has been tested with the CMod-S6. (Writing
flash seems to be one of the most comprehensive tests ...)
dgisselq 2901d 13h /xulalx25soc/trunk/sw/
105 Mostly cosmetic changes. The Makefile now builds a couple more programs,
the documentation is better, etc.
dgisselq 2901d 23h /xulalx25soc/trunk/sw/
104 Updates to the flash driver drawn from the S6SoC project. dgisselq 2901d 23h /xulalx25soc/trunk/sw/
103 Added a SDSPI scope, and defined which of the four scopes it points to.
(It uses the configuration scopes position, if the configuration scope isn't
defined.)
dgisselq 2901d 23h /xulalx25soc/trunk/sw/
93 Oops -- missed adjusting the copyright. dgisselq 2925d 03h /xulalx25soc/trunk/sw/
92 Fixes the problem whereby the master counters show when the user counters should
be showing and vice versa. Now the master counters show by default, together
with their correct labels. User counters are still available by pressing
'u' in the debugger, and the master counter display may be returned to by
pressing 'm' in the debugger.
dgisselq 2925d 03h /xulalx25soc/trunk/sw/
91 Fixes bugs associated with an overflow of write acknowledgements in the
receiver. This helps keep our accesses aligned.
dgisselq 2925d 03h /xulalx25soc/trunk/sw/
78 Comments out the line that caused a compiler warning--setting an unused
variable. Code should be better as a result.
dgisselq 2930d 23h /xulalx25soc/trunk/sw/
77 Adds register names and values for the SD card interface. dgisselq 2930d 23h /xulalx25soc/trunk/sw/
76 Now tries to avoid reading from the stack if the stack addresses are already
known to be bad. That way, the debugger tries to preserve any bus error address
already on the buserr device.
dgisselq 2930d 23h /xulalx25soc/trunk/sw/
53 Added a touch of error checking. dgisselq 2979d 01h /xulalx25soc/trunk/sw/
49 Added some documentation to make the read and write calls easier to understand. dgisselq 3007d 02h /xulalx25soc/trunk/sw/
46 This is a bug fix release--fixing the bug that kept dumpsdram.cpp/wbsdram.v
from working when long pipelined reads were interrupted by the necessity of
a pair of refresh cycles.
dgisselq 3009d 04h /xulalx25soc/trunk/sw/
42 Minor changes. dgisselq 3012d 23h /xulalx25soc/trunk/sw/
41 Bug fix. This was preventing dumpsdram from accurately reading back what
had been written to the RAM earlier.
dgisselq 3012d 23h /xulalx25soc/trunk/sw/
40 This adds to dumpsdram the capability to run over a port, such as with
busmaster_tb.
dgisselq 3014d 10h /xulalx25soc/trunk/sw/
38 Updated to remove the build dependence upon ZipCPU. dgisselq 3016d 09h /xulalx25soc/trunk/sw/

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