OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] - Rev 209

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
209 8b bytes, + formal verification throughout + dcache dgisselq 2104d 08h /zipcpu/
208 Add install and readme files, updated testb to capture initial variable status in Verilator dgisselq 2824d 20h /zipcpu/
207 Updated the ELF support, and divide test-bench. dgisselq 2824d 20h /zipcpu/
206 Updated assembler, fixes several bugs, adds better bug detection and reporting (fixes some segfaults on bugs) dgisselq 2824d 20h /zipcpu/
205 Updating core to current/best version, to include dblfetch support and full CIS support dgisselq 2824d 20h /zipcpu/
204 Added the two simulators back into the SVN repository dgisselq 2843d 15h /zipcpu/
203 Removed the (now unused) old GCC compiler, v5.3.0 dgisselq 2843d 15h /zipcpu/
202 Additional ZipCPU changes associated w 8b upgrade dgisselq 2843d 16h /zipcpu/
201 RTL files for the 8-bit capable ZipCPU. dgisselq 2843d 17h /zipcpu/
200 Lots of GCC bugs fixed, some new features added, longs should work now. The
build scripts have also been updated and simplified.		 dgisselq 2943d 00h /zipcpu/
199 Massive specification rewrite, brings it up to date with the current ZipCPU
state. This does not reflect any major change to the CPU.		 dgisselq 2968d 13h /zipcpu/
198 Added a copyright notice. dgisselq 2969d 17h /zipcpu/
197 Added a new multiply testbench. Other changes were necessary to follow. dgisselq 2969d 17h /zipcpu/
196 Updated internal documentation. dgisselq 2969d 17h /zipcpu/
195 Adds a new mode that can handle a delayed stall signal. dgisselq 2969d 17h /zipcpu/
194 Cleaned up some parameters, trying to create more consistency. dgisselq 2969d 17h /zipcpu/
193 These changes make it so the ALU multiplies pass a test-bench. dgisselq 2969d 17h /zipcpu/
192 Fixed a bug with constant alignment in the assembler. dgisselq 2969d 17h /zipcpu/
191 Updated toolchain, more information on the example debugger. dgisselq 2984d 20h /zipcpu/
190 Added the copyright statement back in. dgisselq 2986d 12h /zipcpu/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.