OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [doc/] - Rev 166

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
164 Updated with inputs from Hellwig Geisse regarding the details of the ECO32
CPU.		 dgisselq 2917d 15h /zipcpu/trunk/doc/
163 Trimmed OR1K instruction set down from 219 instructions, to the minimum number
of 48. Thanks to Olof for helping identify the minimal set!		 dgisselq 2925d 17h /zipcpu/trunk/doc/
162 Noted 64-bit integers are by extension, as are vector instructions. dgisselq 2925d 18h /zipcpu/trunk/doc/
161 Initial version of the ORConf slides, showing only the initial CPU survey. dgisselq 2925d 18h /zipcpu/trunk/doc/
153 Adds internal link functionality to the specification document format. dgisselq 2941d 06h /zipcpu/trunk/doc/
139 Changes necessary to document the changed instruction set: LDIHI became MPY,
and MPYU and MPYS became MPYUHI and MPYSHI respectively. See the specification
for more details.		 dgisselq 2980d 15h /zipcpu/trunk/doc/
107 Adding a missing file. dgisselq 3033d 07h /zipcpu/trunk/doc/
106 Updated to allow building without the sources for the graphics used in the
document.		 dgisselq 3033d 11h /zipcpu/trunk/doc/
92 Adjustments made to match the simplified early branching. dgisselq 3079d 08h /zipcpu/trunk/doc/
85 Minor update/correction to operand B definition. dgisselq 3105d 06h /zipcpu/trunk/doc/
79 Adjusted the opcodes for NOOP, BREAK, and LOCK. dgisselq 3109d 10h /zipcpu/trunk/doc/
78 Found/corrected annoying bug in floating point documentation of the opcode
table.		 dgisselq 3109d 10h /zipcpu/trunk/doc/
73 Documentations updates. dgisselq 3110d 09h /zipcpu/trunk/doc/
72 Some updated graphics, now containing images of the CPU that include the
divide and (currently non-existant) floating point unit.		 dgisselq 3110d 09h /zipcpu/trunk/doc/
69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.		 dgisselq 3116d 14h /zipcpu/trunk/doc/
68 Updated specification, includes well illustrated pipeline discussion. dgisselq 3151d 14h /zipcpu/trunk/doc/
67 Includes timing diagrams in support of a very descriptive specification section. dgisselq 3151d 14h /zipcpu/trunk/doc/
49 Final set of changes finishing the Dhrystone package. Dhrystone, as
implemented by hand in assembly, now works.		 dgisselq 3197d 08h /zipcpu/trunk/doc/
47 Added some new graphics, includes the file for the Zip Bones system. dgisselq 3197d 08h /zipcpu/trunk/doc/
39 Here's the documentation update to support the pipelined read/writes of
the bus from the CPU, as well as the test file that proved they worked.		 dgisselq 3200d 11h /zipcpu/trunk/doc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.