OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [doc/] - Rev 199

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
199 Massive specification rewrite, brings it up to date with the current ZipCPU
state. This does not reflect any major change to the CPU.
dgisselq 2781d 00h /zipcpu/trunk/doc/
190 Added the copyright statement back in. dgisselq 2798d 23h /zipcpu/trunk/doc/
189 Final, as delivered, ORCONF slides. dgisselq 2798d 23h /zipcpu/trunk/doc/
173 Adjusted the pdfinfo field, to accommodate Google's bot. dgisselq 2831d 02h /zipcpu/trunk/doc/
170 Minor updates to the orconf.pdf pre-conference slide. (Added the 'to be
revealed' line.
dgisselq 2843d 02h /zipcpu/trunk/doc/
169 Added details of LM32 to the (pre) ORConf survey slide in trunk/doc. dgisselq 2879d 02h /zipcpu/trunk/doc/
167 Updated the spec to reflect changes in the CC register: the user break
flag, and the ability to command a clearing of the instruction cache.
dgisselq 2892d 02h /zipcpu/trunk/doc/
164 Updated with inputs from Hellwig Geisse regarding the details of the ECO32
CPU.
dgisselq 2900d 08h /zipcpu/trunk/doc/
163 Trimmed OR1K instruction set down from 219 instructions, to the minimum number
of 48. Thanks to Olof for helping identify the minimal set!
dgisselq 2908d 10h /zipcpu/trunk/doc/
162 Noted 64-bit integers are by extension, as are vector instructions. dgisselq 2908d 11h /zipcpu/trunk/doc/
161 Initial version of the ORConf slides, showing only the initial CPU survey. dgisselq 2908d 11h /zipcpu/trunk/doc/
153 Adds internal link functionality to the specification document format. dgisselq 2923d 22h /zipcpu/trunk/doc/
139 Changes necessary to document the changed instruction set: LDIHI became MPY,
and MPYU and MPYS became MPYUHI and MPYSHI respectively. See the specification
for more details.
dgisselq 2963d 07h /zipcpu/trunk/doc/
107 Adding a missing file. dgisselq 3016d 00h /zipcpu/trunk/doc/
106 Updated to allow building without the sources for the graphics used in the
document.
dgisselq 3016d 03h /zipcpu/trunk/doc/
92 Adjustments made to match the simplified early branching. dgisselq 3062d 00h /zipcpu/trunk/doc/
85 Minor update/correction to operand B definition. dgisselq 3087d 23h /zipcpu/trunk/doc/
79 Adjusted the opcodes for NOOP, BREAK, and LOCK. dgisselq 3092d 03h /zipcpu/trunk/doc/
78 Found/corrected annoying bug in floating point documentation of the opcode
table.
dgisselq 3092d 03h /zipcpu/trunk/doc/
73 Documentations updates. dgisselq 3093d 02h /zipcpu/trunk/doc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.