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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

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Rev Log message Author Age Path
106 generic_dpram used simont 7752d 08h /
105 generic_dpram used simont 7752d 08h /
104 use generic_dpram simont 7752d 08h /
103 rename signals simont 7752d 09h /
102 raname signals. simont 7752d 09h /
101 initial inport simont 7752d 13h /
100 use \ simont 7752d 13h /
99 change directory structure simont 7752d 13h /
98 move to rtl/verilog simont 7752d 13h /
97 initial inport simont 7752d 13h /
96 initial import simont 7752d 13h /
95 updating... simont 7752d 13h /
94 fix bug. simont 7752d 13h /
93 OC8051_XILINX_RAM added simont 7752d 13h /
92 initial inport simont 7752d 13h /
91 *** empty log message *** simont 7752d 13h /
90 change module name. simont 7757d 07h /
89 Replaced oc8051_ram by generic_dpram. rherveille 7818d 10h /
88 fix bugs simont 7823d 10h /
87 add include oc8051_defines.v simont 7823d 11h /

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