URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 154

Rev	Log message	Author	Age	Path
154	File name fixed.	simont	7846d 19h	/
153	`ifdef added.	simont	7847d 18h	/
152	sub_result output added.	simont	7847d 18h	/
151	remove pc_r register.	simont	7847d 18h	/
150	fix some bugs.	simont	7847d 18h	/
149	pipelined acces to axternal instruction interface added.	simont	7847d 18h	/
148	include "8051_defines" added.	simont	7847d 19h	/
147	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7869d 19h	/
146	fix bug in movc intruction.	simont	7869d 19h	/
145	fix bug in case of sequence of inc dptr instrucitons.	simont	7874d 23h	/
144	chsnge comp.des to des1	simont	7874d 23h	/
143	add wire sub_result, conect it to des_acc and des1.	simont	7874d 23h	/
142	optimize state machine.	simont	7876d 00h	/
141	remove define OC8051_AS2_PCL, chane signal src_sel2 to 2 bit wide.	simont	7876d 02h	/
140	cahnge assigment to pc_wait (remove istb_o)	simont	7876d 02h	/
139	add aditional alu destination to solve critical path.	simont	7876d 20h	/
138	Change buffering to save one clock per instruction.	simont	7876d 20h	/
137	change to fit xrom.	simont	7877d 01h	/
136	registering outputs.	simont	7877d 01h	/
135	prepared start of receiving if ren is not active.	simont	7883d 00h	/