URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 28

Rev	Log message	Author	Age	Path
28	remove syn signal	simont	7993d 18h	/
27	fix some bugs	simont	7993d 18h	/
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	7993d 20h	/
25	divider and multiplier pass test	markom	7994d 14h	/
24	intensively tests all instructions	markom	7994d 19h	/
23	mul & div use 4 clocks	simont	7995d 10h	/
22	fix some bugs	simont	7995d 10h	/
21	mul bug fixed	markom	7995d 15h	/
20	multiplier and divider changed so they complete in 4 cycles	markom	7995d 17h	/
19	combinatorial loop removed	simont	7996d 10h	/
18	rst signal added	simont	7999d 15h	/
17	fix some bugs	simont	7999d 15h	/
16	inputs ram and op2 removed	simont	7999d 15h	/
15	commbinatorial loop removed	simont	7999d 15h	/
14	added signal ea_int	simont	7999d 17h	/
13	some bug fix	simont	8000d 13h	/
12	des1_r in alu port list	simont	8000d 13h	/
11	des2_r removed	simont	8000d 13h	/
10	% replaced with ^ in uart; some minor improvements	markom	8000d 20h	/
9	removed unused compare states	markom	8002d 12h	/