URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 40

Rev	Log message	Author	Age	Path
40	added sigals for interacting with external ram	simont	7974d 16h	/
39	added signals ack, stb and cyc	simont	7981d 14h	/
38	fix some bugs	simont	7981d 14h	/
37	added signals ack, stb and cyc	simont	7981d 14h	/
36	fix bugs in mode 0	simont	7981d 14h	/
35	design docunemt	simont	7982d 13h	/
34	specification docunemt	simont	7982d 13h	/
33	fix some bugs	simont	7982d 18h	/
32	overflow repaired	simont	7982d 19h	/
31	fix some bugs	simont	7989d 11h	/
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	7992d 17h	/
29	fix some bugs	simont	7992d 18h	/
28	remove syn signal	simont	7992d 18h	/
27	fix some bugs	simont	7992d 19h	/
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	7992d 20h	/
25	divider and multiplier pass test	markom	7993d 15h	/
24	intensively tests all instructions	markom	7993d 20h	/
23	mul & div use 4 clocks	simont	7994d 10h	/
22	fix some bugs	simont	7994d 10h	/
21	mul bug fixed	markom	7994d 15h	/