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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 92

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Rev Log message Author Age Path
92 initial inport simont 7905d 23h /
91 *** empty log message *** simont 7905d 23h /
90 change module name. simont 7910d 16h /
89 Replaced oc8051_ram by generic_dpram. rherveille 7971d 20h /
88 fix bugs simont 7976d 20h /
87 add include oc8051_defines.v simont 7976d 20h /
86 initial input simont 7976d 20h /
85 prepare bugs simont 7976d 20h /
84 remove wb_bus_mon simont 7984d 19h /
83 replace some modules simont 7984d 19h /
82 replace some modules simont 7984d 20h /
81 initial import simont 7984d 20h /
80 removing unused modules simont 7984d 20h /
79 initial import simont 7984d 20h /
78 alu with registered outputs simont 8044d 20h /
77 substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel simont 8053d 17h /
76 add module oc8051_sfr, 256 bytes internal ram simont 8053d 17h /
75 initial import simont 8053d 17h /
74 add module oc8051_wb_iinterface simont 8061d 17h /
73 initial import simont 8061d 17h /

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