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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 98

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Rev Log message Author Age Path
98 move to rtl/verilog simont 7909d 23h /
97 initial inport simont 7909d 23h /
96 initial import simont 7909d 23h /
95 updating... simont 7909d 23h /
94 fix bug. simont 7909d 23h /
93 OC8051_XILINX_RAM added simont 7909d 23h /
92 initial inport simont 7909d 23h /
91 *** empty log message *** simont 7909d 23h /
90 change module name. simont 7914d 17h /
89 Replaced oc8051_ram by generic_dpram. rherveille 7975d 20h /
88 fix bugs simont 7980d 20h /
87 add include oc8051_defines.v simont 7980d 20h /
86 initial input simont 7980d 21h /
85 prepare bugs simont 7980d 21h /
84 remove wb_bus_mon simont 7988d 20h /
83 replace some modules simont 7988d 20h /
82 replace some modules simont 7988d 20h /
81 initial import simont 7988d 20h /
80 removing unused modules simont 7988d 20h /
79 initial import simont 7988d 20h /

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