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URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

Subversion Repositories RISCMCU

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Rev Log message Author Age Path
30 root 5578d 03h /
29 Added old uploaded documents to new repository. root 5578d 10h /
28 New directory structure. root 5578d 10h /
27 ReadME First yapzihe 8016d 08h /
26 too many files yapzihe 8016d 08h /
25 this is the program of the program.mif in the vhdl directory yapzihe 8016d 08h /
24 refer to counter.asm and counter.lst in the asm directory yapzihe 8016d 08h /
23 A demo of MAX+plus II .scf simulation file
The waveform shows how the MCU output 3, 2 and 1 to port B, port C and port D using different instructions.
yapzihe 8016d 08h /
22 hex2mif readme file yapzihe 8016d 09h /
21 hex2mif executable for windows yapzihe 8016d 09h /
20 a simple demo program that output 3, 2, 1 to port b, c and d with different way. yapzihe 8016d 09h /
19 1. Remove the use of frequency divider
2. Uses the same external interrupt pin and timer external clock source pin as AT90S1200
3. Adds some comments to each module instantation.
yapzihe 8018d 05h /
18 no message yapzihe 8024d 21h /
17 RISCMCU Slides Presentation (PDF, 112 KB) yapzihe 8030d 13h /
16 RISCMCU Thesis (PDF, 669 KB) yapzihe 8030d 13h /
15 rename file to RISCMCU_Thesis.pdf yapzihe 8030d 13h /
14 Thesis (PDF 668KB) yapzihe 8031d 01h /
13 removed old version yapzihe 8031d 01h /
12 RISCMCU THESIS (PDF, 668KB) yapzihe 8031d 01h /
11 My thesis for the RISCMCU project, in PDF yapzihe 8033d 06h /

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