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URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

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20 a simple demo program that output 3, 2, 1 to port b, c and d with different way. yapzihe 8208d 17h /
19 1. Remove the use of frequency divider
2. Uses the same external interrupt pin and timer external clock source pin as AT90S1200
3. Adds some comments to each module instantation.
yapzihe 8210d 14h /
18 no message yapzihe 8217d 06h /
17 RISCMCU Slides Presentation (PDF, 112 KB) yapzihe 8222d 22h /
16 RISCMCU Thesis (PDF, 669 KB) yapzihe 8222d 22h /
15 rename file to RISCMCU_Thesis.pdf yapzihe 8222d 22h /
14 Thesis (PDF 668KB) yapzihe 8223d 10h /
13 removed old version yapzihe 8223d 10h /
12 RISCMCU THESIS (PDF, 668KB) yapzihe 8223d 10h /
11 My thesis for the RISCMCU project, in PDF yapzihe 8225d 15h /
10 hex2mif is used to convert HEX file to MIF format yapzihe 8225d 15h /
9 Real applications for testing the microcontroller yapzihe 8225d 15h /
8 move all the VHDL files to here from 'RISCMCU' directory yapzihe 8225d 15h /
7 move to 'vhdl' directory yapzihe 8225d 15h /
6 This commit was manufactured by cvs2svn to create tag 'arelease'. 8242d 09h /
5 no message yapzihe 8242d 09h /
4 I have rearranged some of the codes and added some comments to reflect more clearly what I write in my thesis. It is not tested with the FLEX10K. yapzihe 8242d 09h /
3 Change the 3 level deep hardware stack to 4 level yapzihe 8242d 09h /
2 no message yapzihe 8242d 09h /
1 Standard project directories initialized by cvs2svn. 8242d 09h /

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