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Rev Log message Author Age Path
43 Added forgotten file. nyawn 5330d 21h /
42 Added (experimental) Actel UJTAG TAP core. Added JTAG serial port feature to debug hardware core and JTAG bridge program. Added more speedups for USB JTAG cables to bridge program - USB-Blaster users should now see ~30k/sec upload speeds. Updated documentation. nyawn 5330d 21h /
41 Creating 2.0.0 release. nyawn 5373d 13h /
40 Creating 2.0.0 release. nyawn 5373d 13h /
39 Creating 2.0.0 release. nyawn 5373d 13h /
38 Creating 2.0.0 release. nyawn 5373d 13h /
37 Created tag for release 2.0.0 nyawn 5373d 13h /
36 Create directory for 2.0.0 release. nyawn 5373d 14h /
35 Updated to include new build options. nyawn 5402d 15h /
34 Restored changes accidentally backed out by previous commit. Removed CVS logs. nyawn 5402d 16h /
33 Updated top-level docs to include hi-speed mode. nyawn 5403d 13h /
32 Added a hi-speed mode via a change in protocol in the adv_dbg_if core. This should provide an order-of-magnitude speed improvement for some USB JTAG cables. Updated adv_jtag_bridge to match. Updated adv_dbg_if testbenches. Updated documents to reflect the new hi-speed mode. Added alternate USB-Blaster driver based on libftdi, donated by Xianfeng Zeng. Various bugfixes. nyawn 5403d 14h /
31 Multiple users have reported poor performance with parallel ecables. Raul Fajardo determined that the usleep() call was blocking for much longer than microseconds, and that the system still functions perfectly without any added delay at all. Removed this delay. If strange run-time data errors occur, consider adding this sleep back in, a nanosleep, or a busy-wait loop. nyawn 5500d 15h /
30 Fix copy/paste error in copyright header: replaced verilog-style comments with VHDL comments. nyawn 5515d 17h /
29 Fixed some mutex deadlocks. Thanks to Raul Fajardo and Jose Villar for reporting these. nyawn 5569d 13h /
28 nyawn 5582d 15h /
27 nyawn 5582d 15h /
26 nyawn 5582d 15h /
25 nyawn 5582d 15h /
24 Release 1.2.0 nyawn 5582d 15h /

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