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Rev Log message Author Age Path
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6267d 06h /
57 Updated documentation to EDK32 version. sybreon 6269d 07h /
56 Parameterised optional components into aeMB_xecu.v sybreon 6270d 05h /
55 Upgraded license to LGPLv3.
Significant performance optimisations.		 sybreon 6270d 13h /
54 Added some compilation optimisations. sybreon 6271d 09h /
53 Added GET/PUT support through a FSL bus. sybreon 6271d 09h /
52 Added log output to iverilog.log sybreon 6271d 09h /
51 Fixed data WISHBONE arbitration problem (reported by J Lee). sybreon 6272d 12h /
50 Parameterised optional components. sybreon 6272d 15h /
49 Added random seed for simulation. sybreon 6275d 18h /
48 Fixed spurious interrupt latching during long bus cycles (spotted by J Lee). sybreon 6277d 00h /
47 Added -msoft-float and -mxl-soft-div compiler flags. sybreon 6277d 00h /
46 Minor code cleanup. sybreon 6277d 21h /
45 Minor code cleanup. sybreon 6277d 21h /
44 Added better (beta) interrupt support.
Changed MSR_IE to disabled at reset as per MB docs.		 sybreon 6278d 10h /
43 Added interrupt simulation.
Changed "human readable" simulation output.		 sybreon 6278d 10h /
42 Enable MSR_IE with software. sybreon 6278d 11h /
41 New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
Fixed various minor data hazard bugs.
Code compatible with -O0/1/2/3/s generated code.		 sybreon 6279d 02h /
40 Recommended to compile code with -O2/3/s sybreon 6289d 10h /
39 Made some changes to the interrupt control. In some cases, the interrupt logic waits forever and doesn't execute. Bug was discovered by M. Ettus. sybreon 6289d 10h /

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