URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] - Rev 77

Rev	Log message	Author	Age	Path
77	This commit was manufactured by cvs2svn to create branch 'AEMB2_712'.		6021d 19h	/
76	initial	sybreon	6021d 19h	/
75	This commit was manufactured by cvs2svn to create tag 'AEMB_711'.		6028d 21h	/
74	Minor code cleanup.	sybreon	6028d 21h	/
73	Moved simulation kernel into code.	sybreon	6028d 21h	/
72	Minor code cleanup.	sybreon	6028d 22h	/
71	Old version deprecated.	sybreon	6036d 00h	/
70	Change interrupt to positive level triggered interrupts.	sybreon	6036d 23h	/
69	Removed unnecessary byte acrobatics with VMEM data.	sybreon	6038d 20h	/
68	Generate VMEM instead of HEX dumps of programme.	sybreon	6038d 20h	/
67	Minor simulation fixes.	sybreon	6040d 19h	/
66	Added fsl_tag_o to FSL bus (tag either address or data).	sybreon	6042d 16h	/
65	Fixed minor typo causing synthesis failure.	sybreon	6044d 05h	/
64	Fixed minor interrupt test typo.	sybreon	6044d 15h	/
63	Fixed interrupt signal synchronisation.	sybreon	6044d 15h	/
62	Fixed minor typo.	sybreon	6044d 15h	/
61	Changed interrupt handling system (reported by M. Ettus).	sybreon	6044d 16h	/
60	Added interrupt test routine.	sybreon	6044d 16h	/
59	Added posedge/negedge bus interface. Modified interrupt test system.	sybreon	6044d 16h	/
58	Updated simulation to also check BRI 0x00 instruction.	sybreon	6045d 15h	/