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[/] - Rev 6

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6 Worked with Xilinx 13.7, not with others. Replaced variable with shift register with constant length one. feketebv 3725d 16h /
5 feketebv 3969d 15h /
4 feketebv 3969d 15h /
3 feketebv 3969d 15h /
2 feketebv 3969d 16h /
1 The project and the structure was created root 4173d 14h /

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