URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] - Rev 32

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
32	Added clock cycle counting register to test_module to support dhrystone performance measurement	csantifort	4938d 20h	/
31	Added dhrystone benchmark test	csantifort	4938d 20h	/
30	Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays	csantifort	4952d 02h	/
29	Use lgo command for saving waveforms in modelsim	csantifort	4953d 20h	/
28	Moved function prototypes to .h file	csantifort	4953d 21h	/
27	Got working with cadence nc simulator	csantifort	4987d 03h	/
26	Added wish list	csantifort	4992d 03h	/
25	Bug fix: boot-loader.mem became larger that the allowed 8k byte boot mem size. Removed a struct in elfsplitter.c thats only used for debug - this reduced boot-loader.mem enough so that it fits again. Tidy up: Removed a debug message from hw/tools/run.sh	csantifort	4994d 01h	/
24	Added instructions how to build Linux kernel from source files	csantifort	4996d 01h	/
23	Split the source files list into a Vertex-6 only list and a Spartan-6 only list. That way users don;t need to delete files from the list manually if they only have a setup for one of the FPGA types.	csantifort	4996d 02h	/
22	Added files and instructions to enable the building of the vmlinux image from the kernel source files.	csantifort	5000d 01h	/
21	Fixed bug in the conditions to create the FPGA configuration log file. I added the creation of the log file in the last release, but the way it was implemented was causing the Makefile to always rebuild from the start.	csantifort	5000d 01h	/
20	Added feature to A25 core to directly use a read value from the write back stage to reduce the stall to 1 cycle when there is a register conflict with the following instruction. This increases performance by about 3%.	csantifort	5021d 02h	/
19	Create a configuration log file as part of the synthesis flow. This file is a useful reference to tell the different bitfiles apart.	csantifort	5021d 02h	/
18	Added list of source files and diagram for Amber25 core.	csantifort	5024d 01h	/
17	amber25 core bug fix. The return address for irq interrupts was off by 4 bytes when the interrupt occurred during a stm instruction with the following instruction having some register conflicts. Added test irq_stm to catch the bug. Cleaned up some header descriptions	csantifort	5025d 00h	/
16	Deleted the old version of the 3-state amber core. Its replaced with amber23. Added the 5-state Amber core.	csantifort	5027d 14h	/
15	Copied amber to amber23, Many system changes to support new amber25 core.	csantifort	5027d 14h	/
14	Re-wrote the behavioral clock generation code to more accurately calculate the sys_clk frequency. The previous version was not producing the correct frequency at higher frequenies due to rounding errors.	csantifort	5029d 02h	/
13	Bug fix - added an extra state to the rx state machine to properly align reading the uart input to the middle of each bit.	csantifort	5029d 02h	/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories amber

[/] - Rev 32

Filtering Options