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48 Fixed a bug in linux that caused the os to not return to the running application after an interrupt.
Hello-world now runs stand-alone again.
Added initrd-200k-dhry, a disk image that uses the dhry program for init.
csantifort 4965d 03h /
47 Changed V6 VCo from 1000Mhz to 1200 MHz csantifort 4985d 00h /
46 svn ignore vmlinux.dis and vmlinux.mem csantifort 4992d 22h /
45 Store vmlinux.mem and vmlinux.dis in compressed form csantifort 4992d 22h /
44 Updated vmlinux image based on last change csantifort 4992d 22h /
43 Added support for the flat executable file format to vmlinux, so that the hello-world program is correctly relocated when it is loaded at the end of the vmlinux test.
Changed the Virtex-5 clock configuration to use a 1200MHz VCO frequency and 80MHz system clock frequency.
csantifort 4992d 22h /
42 Added write buffer - fixes bug if wishbone writes takes multiple cycles to complete csantifort 5010d 19h /
41 Added instructions on how to use Coregen to create the Spartan-6 DDR3 memory interface. csantifort 5012d 03h /
40 Added wishbone bus jitter testing option.
Cleaned up waveform log .do files, now seperate files for a23 and a25 cores.
Added vmlinux executable elf file for running on hardware.
csantifort 5016d 20h /
39 Added a second level of buffering to a25_wishbone_buf to fix a lockup
bug when write acks to not return immediately, and also to improve performance slightly
csantifort 5017d 21h /
38 support 128-bit wishbone now used for a25 core csantifort 5018d 21h /
37 128-bit wide boot memory module csantifort 5019d 19h /
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 5019d 20h /
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 5021d 03h /
34 Tweaked strcpy function to speed it up slightly csantifort 5022d 00h /
33 Fixed bug in div assembly function. Handles negative numbers correctly.
Fixed bug in printf function, negative numbers now print correctly.
csantifort 5022d 20h /
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 5023d 20h /
31 Added dhrystone benchmark test csantifort 5023d 21h /
30 Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays csantifort 5037d 03h /
29 Use lgo command for saving waveforms in modelsim csantifort 5038d 21h /

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