URL https://opencores.org/ocsvn/apbi2c/apbi2c/trunk

Subversion Repositories apbi2c

[/] - Rev 24

Rev	Log message	Author	Age	Path
24	Correcetd modules and back again toold plan on fifo using only registers.	redbear	3872d 13h	/
23	correcting TX FSM	redbear	3886d 19h	/
22	Correcting TX transmission and remove tri state from RTL.	redbear	3887d 13h	/
21	added tri state on module i2c	redbear	3900d 16h	/
20	Finished a previous version from RX and added SDA and SCL enable to PADS.	redbear	3901d 11h	/
19	changes about area use for proprely use.	redbear	3946d 11h	/
18	Corrected fifo mem acess, i2c_module and revised conections on top	redbear	3963d 11h	/
17	fifo.v and dual_port_ram.v	celaya.dario	3964d 12h	/
16	fifo.v and dual_port_ram.v	celaya.dario	3964d 12h	/
15	11'd1 to 4'd1	redbear	3970d 18h	/
14	added a and to make real full fifo.	redbear	3970d 18h	/
13	re write all fifo module to write and give full when the same is not full	redbear	3970d 18h	/
12	added PSELx on WR_ENA, RD_ENA to correct read/write when PSEL is HIGH	redbear	3970d 18h	/
11	Added configuration to define RX and TX operation and configure propely the ports.	redbear	3977d 14h	/
10	Correcting a few words wrote wrong.	redbear	3977d 14h	/
9	More description added on spec	redbear	3978d 16h	/
8	More description added on spec	redbear	3978d 16h	/
7	Corrected CLOCK generated by SCL according NXP spec.	redbear	3979d 17h	/
6	Adding a basic FSM to RX.	redbear	3984d 17h	/
5	Added about APB address necessary to read and write on FIFOS and register configuration.	redbear	3992d 14h	/