URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] - Rev 79

Rev	Log message	Author	Age	Path
79	update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation	wsong0210	4533d 11h	/
78	pass link	wsong0210	4699d 22h	/
77	pass syn elaboration	wsong0210	4700d 22h	/
76	fix syntex	wsong0210	4704d 22h	/
75	code finished, start the debugging	wsong0210	4704d 22h	/
74	in/out buffer finished	wsong0210	4705d 22h	/
73	input buffer	wsong0210	4712d 22h	/
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4713d 22h	/
71	the buffered 2-stage Clos switch	wsong0210	4714d 22h	/
70	clos-opt ongoing	wsong0210	4714d 22h	/
69	central module of the Clos	wsong0210	4717d 22h	/
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4718d 22h	/
67	structure not good, prepare to use new files	wsong0210	4718d 23h	/
66	clos opt ongoing	wsong0210	4733d 16h	/
65	pipeline controller	wsong0210	4733d 17h	/
64	clos opt ongoing	wsong0210	4733d 17h	/
63	clos opt ongoing	wsong0210	4733d 21h	/
62	clos opt ongoing	wsong0210	4734d 22h	/
61	settle down the pipeline controller	wsong0210	4739d 21h	/
60	try to make the address comparison relaxed QDI	wsong0210	4742d 22h	/