OpenCores
URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] - Rev 81

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
81 adding a solution in README to a cell lib problem. wsong0210 4570d 01h /
80 make the README file more understandable wsong0210 4649d 22h /
79 update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation wsong0210 4710d 07h /
78 pass link wsong0210 4876d 19h /
77 pass syn elaboration wsong0210 4877d 18h /
76 fix syntex wsong0210 4881d 19h /
75 code finished, start the debugging wsong0210 4881d 19h /
74 in/out buffer finished wsong0210 4882d 19h /
73 input buffer wsong0210 4889d 18h /
72 clos-opt ongoing, Clos switch finished, nxt input buffer wsong0210 4890d 19h /
71 the buffered 2-stage Clos switch wsong0210 4891d 19h /
70 clos-opt ongoing wsong0210 4891d 19h /
69 central module of the Clos wsong0210 4894d 18h /
68 rewite the clos switch in the SDM-Clos-buf router wsong0210 4895d 19h /
67 structure not good, prepare to use new files wsong0210 4895d 20h /
66 clos opt ongoing wsong0210 4910d 13h /
65 pipeline controller wsong0210 4910d 13h /
64 clos opt ongoing wsong0210 4910d 13h /
63 clos opt ongoing wsong0210 4910d 18h /
62 clos opt ongoing wsong0210 4911d 19h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.