OpenCores
URL https://opencores.org/ocsvn/atlas_core/atlas_core/trunk

Subversion Repositories atlas_core

[/] - Rev 23

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
23 new version!
- new wishbone bus adapter added (com1_core)
- conditional move instructions added
zero_gravity 3883d 21h /
22 DOC update (error corrections) zero_gravity 3890d 21h /
21 New repository setup for the brand new Atlas 2k Processor! zero_gravity 3898d 19h /
20 re-init of project repository zero_gravity 3898d 19h /
19 bug fixes in:
- MMU.vhd
- BUS_INTERFACE.vhd

initial setup of "atlas-x2" project folder
zero_gravity 4151d 00h /
18 huge update:
- doc update
- several bug-fixes in MMU, CTRL and BUS_INTERFACE.vhd
have fun ;)
zero_gravity 4173d 21h /
17 - new interrupt vector: unique vector for undefined instructions / access violations ("command error trap")
- bug fix in assembler: correct absolute address generator - assembler works fine now ;)
zero_gravity 4184d 01h /
16 - assembler update: assembler can now include other files using the ".include" statement
- doc update: fixed error in instruction summary table
zero_gravity 4196d 03h /
15 - new instruction added: NEG Rd, Rx (Rd <- 0 - Ra)
- instruction is built from redundant SUB with identical operands (SUB Rd, Ra, Ra; will always result in 0)
- since there are other instructions to clear a register, the redundant SUB has been recoded to perform the NEG operation
- NEG operation added to documentary and assembler
zero_gravity 4203d 04h /
14 - instruction set summary card added to documentary (Atlas Processor Datasheet)
- minor edits in SYS_REG.vhd and ATLAS_pkg.vhd files
zero_gravity 4204d 00h /
13 - new option added to the RT/GT/STPC instructions
- ATLAS_MICRO implementation scheme added (+testbench)
- huge DOC update
zero_gravity 4218d 19h /
12 - assembler: dev c++ project changed to 32-bit
- atlas_asm.exe is now compiled for 32-bit system
zero_gravity 4241d 01h /
11 - optimized memory components
-> less access hardware
-> easier mapping for quartus sythesis tool
zero_gravity 4243d 19h /
10 - optimized opcode decoder
- deleted HALT signal from Atlas Micro - not feasible here
- doc update
zero_gravity 4243d 20h /
9 - ATLAS_MICRO implementation example added to project (CPU + I/D memory) zero_gravity 4244d 21h /
8 - bug-fix: MSR read access
- new instruction added: SPR (store parity of register to T-flag)
- doc update
- assembler update
zero_gravity 4244d 23h /
7 - data path diagram added to documentary (finally!!)
- updated assembler version
- updated assembler examples
zero_gravity 4248d 00h /
6 - more code examples added to documentary
- minor updates for RTL files
- assembler now supports binary and hexadecimal number representation
zero_gravity 4250d 22h /
5 - error corrected in data sheet's branch table asm example zero_gravity 4256d 03h /
4 - complete update zero_gravity 4256d 03h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.