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Rev Log message Author Age Path
115 Artisan ram instances added. simons 7612d 15h /
114 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7639d 16h /
113 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7639d 16h /
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7639d 16h /
111 Fixed according to the linter.
Case statement for data_out joined.
mohor 7641d 16h /
110 Fixed according to the linter. mohor 7641d 16h /
109 Fixed according to the linter. mohor 7641d 17h /
108 Fixed according to the linter. mohor 7641d 17h /
107 Fixed according to the linter. mohor 7641d 18h /
106 Unused signal removed. mohor 7647d 15h /
105 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7648d 05h /
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.
tadejm 7648d 05h /
103 This commit was manufactured by cvs2svn to create tag 'complete_1'. 7650d 20h /
102 Little fixes (to fix warnings). mohor 7650d 20h /
101 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7654d 21h /
100 Synchronization changed. mohor 7654d 21h /
99 PCI_BIST replaced with CAN_BIST. mohor 7654d 21h /
98 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7660d 09h /
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7660d 09h /
96 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7660d 10h /

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