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[/] - Rev 119

Rev	Log message	Author	Age	Path
119	Artisan RAMs added.	mohor	8129d 05h	/
118	Artisan RAM fixed (when not using BIST).	mohor	8129d 05h	/
117	Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need to be joined together on higher level.	mohor	8129d 05h	/
116	This commit was manufactured by cvs2svn to create tag 'rel_14'.		8134d 23h	/
115	Artisan ram instances added.	simons	8134d 23h	/
114	This commit was manufactured by cvs2svn to create tag 'rel_13'.		8162d 00h	/
113	This commit was manufactured by cvs2svn to create tag 'rel_12'.		8162d 00h	/
112	Tx and rx length are limited to 8 bytes regardless to the DLC value.	tadejm	8162d 00h	/
111	Fixed according to the linter. Case statement for data_out joined.	mohor	8164d 00h	/
110	Fixed according to the linter.	mohor	8164d 00h	/
109	Fixed according to the linter.	mohor	8164d 01h	/
108	Fixed according to the linter.	mohor	8164d 01h	/
107	Fixed according to the linter.	mohor	8164d 02h	/
106	Unused signal removed.	mohor	8169d 23h	/
105	This commit was manufactured by cvs2svn to create tag 'rel_11'.		8170d 13h	/
104	Synchronization fixed. In some strange cases it didn't work according to the VHDL reference model.	tadejm	8170d 13h	/
103	This commit was manufactured by cvs2svn to create tag 'complete_1'.		8173d 04h	/
102	Little fixes (to fix warnings).	mohor	8173d 04h	/
101	This commit was manufactured by cvs2svn to create tag 'rel_10'.		8177d 06h	/
100	Synchronization changed.	mohor	8177d 06h	/