URL https://opencores.org/ocsvn/can/can/trunk

Subversion Repositories can

[/] - Rev 127

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
127	Fixing the core to be Bosch VHDL Reference compatible.	mohor	7898d 17h	/
126	Error counters fixed to be compatible with Bosch VHDL reference model. Small synchronization changes.	mohor	7899d 13h	/
125	Synchronization changed, error counters fixed.	mohor	7903d 19h	/
124	ALTERA_RAM supported.	mohor	7924d 01h	/
123	This commit was manufactured by cvs2svn to create tag 'rel_17'.		7931d 07h	/
122	This commit was manufactured by cvs2svn to create tag 'rel_16'.		7931d 07h	/
121	When detecting bus-free, signal bus_free_cnt_en was cleared to zero although the last sampled bit was zero instead of one.	mohor	7931d 07h	/
120	This commit was manufactured by cvs2svn to create tag 'rel_15'.		7940d 04h	/
119	Artisan RAMs added.	mohor	7940d 04h	/
118	Artisan RAM fixed (when not using BIST).	mohor	7940d 04h	/
117	Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need to be joined together on higher level.	mohor	7940d 04h	/
116	This commit was manufactured by cvs2svn to create tag 'rel_14'.		7945d 21h	/
115	Artisan ram instances added.	simons	7945d 21h	/
114	This commit was manufactured by cvs2svn to create tag 'rel_13'.		7972d 22h	/
113	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7972d 22h	/
112	Tx and rx length are limited to 8 bytes regardless to the DLC value.	tadejm	7972d 22h	/
111	Fixed according to the linter. Case statement for data_out joined.	mohor	7974d 22h	/
110	Fixed according to the linter.	mohor	7974d 22h	/
109	Fixed according to the linter.	mohor	7975d 00h	/
108	Fixed according to the linter.	mohor	7975d 00h	/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories can

[/] - Rev 127

Filtering Options