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Rev Log message Author Age Path
137 Header changed. mohor 7956d 23h /
136 Error counters changed. mohor 7956d 23h /
135 Header changed. mohor 7956d 23h /
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.
mohor 8064d 21h /
133 This commit was manufactured by cvs2svn to create tag 'rel_19'. 8071d 08h /
132 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 8071d 08h /
131 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 8071d 08h /
130 mbist signals updated according to newest convention markom 8071d 08h /
129 Error counters changed. mohor 8087d 16h /
128 This commit was manufactured by cvs2svn to create tag 'rel_18'. 8087d 17h /
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 8087d 17h /
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 8088d 13h /
125 Synchronization changed, error counters fixed. mohor 8092d 19h /
124 ALTERA_RAM supported. mohor 8113d 01h /
123 This commit was manufactured by cvs2svn to create tag 'rel_17'. 8120d 07h /
122 This commit was manufactured by cvs2svn to create tag 'rel_16'. 8120d 07h /
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
mohor 8120d 07h /
120 This commit was manufactured by cvs2svn to create tag 'rel_15'. 8129d 03h /
119 Artisan RAMs added. mohor 8129d 03h /
118 Artisan RAM fixed (when not using BIST). mohor 8129d 04h /

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