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Rev Log message Author Age Path
137 Header changed. mohor 7583d 21h /
136 Error counters changed. mohor 7583d 21h /
135 Header changed. mohor 7583d 21h /
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.
mohor 7691d 19h /
133 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7698d 06h /
132 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7698d 06h /
131 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7698d 06h /
130 mbist signals updated according to newest convention markom 7698d 06h /
129 Error counters changed. mohor 7714d 14h /
128 This commit was manufactured by cvs2svn to create tag 'rel_18'. 7714d 15h /
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7714d 15h /
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 7715d 11h /
125 Synchronization changed, error counters fixed. mohor 7719d 17h /
124 ALTERA_RAM supported. mohor 7739d 23h /
123 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7747d 05h /
122 This commit was manufactured by cvs2svn to create tag 'rel_16'. 7747d 05h /
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
mohor 7747d 05h /
120 This commit was manufactured by cvs2svn to create tag 'rel_15'. 7756d 02h /
119 Artisan RAMs added. mohor 7756d 02h /
118 Artisan RAM fixed (when not using BIST). mohor 7756d 02h /

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