OpenCores
URL https://opencores.org/ocsvn/can/can/trunk

Subversion Repositories can

[/] - Rev 59

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
59 8051 interface added (besides WISHBONE interface). Selection is made in
can_defines.v file.
mohor 7978d 01h /
58 timescale.v is used for simulation only. mohor 7978d 13h /
57 Mux used for clkout to avoid "gated clocks warning". mohor 7978d 13h /
56 Doubled declarations removed. mohor 7979d 12h /
55 wire declaration added. mohor 7979d 12h /
54 This commit was manufactured by cvs2svn to create tag 'branch-release-1-0'. 7984d 14h /
53 CAN pins located. mohor 7984d 14h /
52 tx_o is now tristated signal. tx_oen and tx_o combined together. mohor 7984d 14h /
51 Xilinx RAM added. mohor 7984d 14h /
50 Top level signal names changed. mohor 7984d 14h /
49 Actel APA ram changed. Now synchronous read is used. mohor 7988d 06h /
48 Actel APA ram supported. mohor 7988d 06h /
47 Data is latched on read. mohor 7988d 07h /
46 This commit was manufactured by cvs2svn to create tag 'rel_1'. 7998d 05h /
45 When a dominant bit was detected at the third bit of the intermission and
node had a message to transmit, bit_stuff error could occur. Fixed.
mohor 7998d 05h /
44 When bit error occured while active error flag was transmitted, counter was
not incremented.
mohor 7998d 06h /
43 Directory keeper. mohor 7998d 12h /
42 Initial version of the project. mohor 7998d 12h /
41 Incomplete sensitivity list fixed. mohor 7998d 14h /
40 Typo fixed. mohor 7998d 14h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.