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89 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7807d 01h /
88 Previous change removed. When resynchronization occurs we go to seg1
stage. sync stage does not cause another start of seg1 stage.
mohor 7807d 01h /
87 When hard_sync or resync occure we need to go to seg1 segment. Going to
sync segment is in that case blocked.
mohor 7807d 01h /
86 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7808d 17h /
85 Typo fixed. mohor 7808d 17h /
84 clk_cnt reduced from [8:0] to [6:0]. mohor 7810d 00h /
83 cs_can_i is used only when WISHBONE interface is not used. mohor 7810d 01h /
82 Removed few signals. mohor 7810d 01h /
81 "chip select" signal cs_can_i is used only when not using WISHBONE
interface.
mohor 7810d 01h /
80 Form error was detected when stuff bit occured at the end of crc. mohor 7810d 01h /
79 Bit stuffing corrected when stuffing comes at the end of the crc. tadejm 7811d 01h /
78 tx_point generated one clk earlier. rx_i registered. Data corrected when
using extended mode.
mohor 7811d 02h /
77 Synchronization is also needed when transmitting a message. mohor 7814d 01h /
76 Counters width changed. mohor 7814d 01h /
75 When switching to tx, sync stage is overjumped. mohor 7816d 01h /
74 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7816d 06h /
73 overrun and length_info fifos are initialized at the end of reset. mohor 7816d 06h /
72 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7818d 04h /
71 Ports added for the CAN_BIST. mohor 7818d 04h /
70 data_out is already registered in the can_top.v file. mohor 7818d 04h /

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