OpenCores
URL https://opencores.org/ocsvn/common/common/trunk

Subversion Repositories common

[/] - Rev 19

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
19 no message bbeaver 8322d 15h /
18 no message bbeaver 8323d 13h /
17 Fixed link to specification_template.dot lampret 8323d 21h /
16 Added updated opencores coding guidelines. Added ver_plan.pdf and Specification template for Word. lampret 8323d 22h /
15 no message bbeaver 8343d 19h /
14 adding beginning LPM files bbeaver 8355d 15h /
13 This commit was manufactured by cvs2svn to create tag 'initial'. 8361d 15h /
12 Major cleanup.
Files are now compliant to Altera & Xilinx memories.
Memories are now compatible, i.e. drop-in replacements.
Added synthesizeable generic FPGA description.
Created "generic_memories" cvs entry.
rherveille 8361d 15h /
11 no message bbeaver 8368d 14h /
10 no message bbeaver 8368d 14h /
9 no message bbeaver 8372d 12h /
8 no message bbeaver 8372d 12h /
7 no message bbeaver 8372d 13h /
6 no message bbeaver 8372d 13h /
5 no message bbeaver 8372d 14h /
4 no message bbeaver 8372d 14h /
3 This commit was manufactured by cvs2svn to create tag 'arelease'. 8372d 15h /
2 no message bbeaver 8372d 15h /
1 Standard project directories initialized by cvs2svn. 8372d 15h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.