URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] - Rev 144

Rev	Log message	Author	Age	Path
144	Port names and defines for the supported CPUs changed.	igorm	7542d 19h	/
143	Signals for easier debugging removed.	igorm	7542d 21h	/
142	Typo fixed.	igorm	7542d 22h	/
141	data_cnt_lim length changed to reduce number of warnings.	igorm	7543d 17h	/
140	CRC checking of incoming CRC added to all tasks.	igorm	7544d 08h	/
139	New release of the debug interface (3rd. release).	igorm	7546d 11h	/
138	Temp version before changing dbg interface.	igorm	7552d 15h	/
137	This commit was manufactured by cvs2svn to create tag 'rel_22'.		7556d 16h	/
136	Table describing chain codes added.	igorm	7556d 16h	/
135	'hz changed to 1'hz because Icarus complains.	igorm	7559d 15h	/
134	This commit was manufactured by cvs2svn to create tag 'rel_21'.		7560d 14h	/
133	This commit was manufactured by cvs2svn to create tag 'highland_ver1'.		7560d 14h	/
132	Documentation updated. Many missing things added.	igorm	7560d 14h	/
131	Documentation updated. Many missing things added.	igorm	7560d 14h	/
130	This commit was manufactured by cvs2svn to create tag 'rel_20'.		7602d 13h	/
129	New documentation.	mohor	7602d 13h	/
128	Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are turned on.	mohor	7604d 21h	/
127	This commit was manufactured by cvs2svn to create tag 'rel_19'.		7607d 20h	/
126	run_sim.scr renamed to run_sim for VATS.	mohor	7607d 20h	/
125	This commit was manufactured by cvs2svn to create tag 'rel_18'.		7609d 17h	/