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Rev Log message Author Age Path
34 Product brief added to cvs. mohor 8160d 20h /
33 LatchedJTAG_IR used when muxing TDO instead of JTAG_IR. mohor 8166d 00h /
32 Stupid bug that was entered by previous update fixed. mohor 8166d 23h /
31 trst synchronization is not needed and was removed. mohor 8167d 00h /
30 IDCODE bug fixed, chains reused to decreas size of core. Data is shifted-in
not filled-in. Tested in hw.
mohor 8178d 05h /
29 Document revised and put tp better form. mohor 8181d 18h /
28 TDO and TDO Enable signal are separated into two signals. mohor 8214d 01h /
27 Warnings from synthesys tools fixed. mohor 8228d 02h /
26 Warnings from synthesys tools fixed. mohor 8228d 03h /
25 trst signal is synchronized to wb_clk_i. mohor 8228d 23h /
24 CRC changed so more thorough testing is done. mohor 8230d 01h /
23 Trace disabled by default. mohor 8236d 03h /
22 Register length fixed. mohor 8236d 03h /
21 CRC is returned when chain selection data is transmitted. mohor 8236d 23h /
20 Crc generation is different for read or write commands. Small synthesys fixes. mohor 8238d 02h /
19 Wishbone data latched on wb_clk_i instead of risc_clk. mohor 8250d 02h /
18 Reset signals are not combined any more. mohor 8252d 11h /
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.
mohor 8276d 01h /
16 bs_chain_o port added. mohor 8278d 01h /
15 bs_chain_o added. mohor 8278d 02h /

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