URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

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Rev	Log message	Author	Age	Path
43	Intentional error removed.	mohor	8107d 14h	/
42	A block for checking possible simulation/synthesis missmatch added.	mohor	8107d 16h	/
41	Function changed to logic because of some synthesis warnings.	mohor	8115d 13h	/
40	Signal tdo_padoe_o changed back to tdo_padoen_o.	mohor	8129d 13h	/
39	tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just not named correctly.	mohor	8130d 14h	/
38	Few outputs for boundary scan chain added.	mohor	8143d 13h	/
37	tap_top and dbg_top modules are put into two separate modules. tap_top contains only tap state machine and related logic. dbg_top contains all logic necessery for debugging.	mohor	8143d 17h	/
36	Structure changed. Hooks for jtag chain added.	mohor	8147d 12h	/
35	Dbg support datasheet added to cvs.	mohor	8171d 17h	/
34	Product brief added to cvs.	mohor	8172d 11h	/
33	LatchedJTAG_IR used when muxing TDO instead of JTAG_IR.	mohor	8177d 15h	/
32	Stupid bug that was entered by previous update fixed.	mohor	8178d 14h	/
31	trst synchronization is not needed and was removed.	mohor	8178d 15h	/
30	IDCODE bug fixed, chains reused to decreas size of core. Data is shifted-in not filled-in. Tested in hw.	mohor	8189d 20h	/
29	Document revised and put tp better form.	mohor	8193d 09h	/
28	TDO and TDO Enable signal are separated into two signals.	mohor	8225d 16h	/
27	Warnings from synthesys tools fixed.	mohor	8239d 17h	/
26	Warnings from synthesys tools fixed.	mohor	8239d 18h	/
25	trst signal is synchronized to wb_clk_i.	mohor	8240d 14h	/
24	CRC changed so more thorough testing is done.	mohor	8241d 16h	/

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Subversion Repositories dbg_interface

[/] - Rev 43

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