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76 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7535d 23h /
75 Simulation files. mohor 7535d 23h /
74 Removed. mohor 7535d 23h /
73 CRC logic changed. mohor 7535d 23h /
72 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7538d 05h /
71 Mbist support added. simons 7538d 05h /
70 A pdf copy of existing doc document. simons 7545d 07h /
69 WBCNTL added, multiple CPU support described. simons 7565d 21h /
68 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7571d 01h /
67 Lower two address lines must be always zero. simons 7571d 01h /
66 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7572d 01h /
65 WB_CNTL register added, some syncronization fixes. simons 7572d 01h /
64 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7592d 01h /
63 Three more chains added for cpu debug access. simons 7592d 01h /
62 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7620d 01h /
61 Lapsus fixed. simons 7620d 01h /
60 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7620d 01h /
59 Reset value for riscsel register set to 1. simons 7620d 01h /
58 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7620d 03h /
57 Multiple cpu support added. simons 7620d 03h /

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