OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 101

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8257d 11h /
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 8257d 11h /
99 Document revised. mohor 8264d 10h /
98 Document revised. mohor 8264d 10h /
97 Small typo fixed. lampret 8281d 08h /
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 8285d 08h /
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8285d 11h /
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 8285d 11h /
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8290d 09h /
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8291d 12h /
91 Comments in Slovene language removed. mohor 8291d 12h /
90 casex changed with case, fifo reset changed. mohor 8291d 12h /
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8295d 10h /
88 rx_fifo was not always cleared ok. Fixed. mohor 8301d 08h /
87 Status was not latched correctly sometimes. Fixed. mohor 8301d 11h /
86 Big Endian problem when sending frames fixed. mohor 8302d 18h /
85 Log info was missing. mohor 8308d 04h /
84 LinkFail signal was not latching appropriate bit. mohor 8308d 04h /
83 MAC address recognition was not correct (bytes swaped). mohor 8308d 04h /
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8308d 05h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.