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157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 8116d 08h /
156 Valid testbench. mohor 8116d 08h /
155 Minor changes. mohor 8116d 08h /
154 Design document is still under construction. mohor 8117d 07h /
153 Temp version (backup). mohor 8117d 23h /
152 Version 1.16 created. See revision history in the document for details. mohor 8117d 23h /
151 This commit was manufactured by cvs2svn to create tag 'rel_4'. 8118d 00h /
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.
mohor 8118d 00h /
149 Signals related to the control frames connected. Debug registers reg1, 2, 3, 4
connected.
mohor 8118d 00h /
148 Bug when last byte of destination address was not checked fixed. mohor 8118d 00h /
147 ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to
the control frames connected.
mohor 8118d 00h /
146 CarrierSenseLost status is not set when working in loopback mode. mohor 8118d 00h /
145 Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL). mohor 8118d 00h /
144 This commit was manufactured by cvs2svn to create tag
'runing_under_uclinux'.
8134d 03h /
143 Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.
mohor 8134d 03h /
142 This commit was manufactured by cvs2svn to create tag 'rel_3'. 8136d 21h /
141 Syntax error fixed. mohor 8136d 21h /
140 Syntax error fixed. mohor 8136d 21h /
139 Synchronous reset added to all registers. Defines used for width. r_MiiMRst
changed from bit position 10 to 9.
mohor 8136d 21h /
138 Synchronous reset added. mohor 8136d 21h /

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