URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 203

Rev	Log message	Author	Age	Path
203	Virtual Silicon RAM might be used in the ASIC implementation of the ethernet core.	mohor	8099d 13h	/
202	CsMiss added. When address between 0x800 and 0xfff is accessed within Ethernet Core, error acknowledge is generated.	mohor	8102d 14h	/
201	Core size added to the document.	mohor	8102d 15h	/
200	File with lower case checked in instead.	mohor	8102d 15h	/
199	Datasheet name changed to lower case name.	mohor	8102d 15h	/
198	Removed file. File with name in lower case will be added instead.	mohor	8102d 15h	/
197	Ethernet Data Sheet.	mohor	8102d 15h	/
196	Ethernet product brief.	mohor	8102d 16h	/
195	Product brief removed because it is the same as Datasheet.	mohor	8102d 16h	/
194	Full duplex tests modified and testbench bug repaired.	tadej	8102d 17h	/
193	Temp version (backup).	mohor	8102d 19h	/
192	Some additional reports added	tadej	8104d 13h	/
191	Bug repaired in eth_phy device	tadej	8104d 13h	/
190	Several information added to the file.	mohor	8104d 14h	/
189	Simple testbench that includes eth_cop, eth_host and eth_memory modules. This testbench is used for testing the whole environment. Use tb_ethernet testbench for testing just the ethernet MAC core (many tests).	mohor	8104d 15h	/
188	PHY changed.	tadej	8105d 11h	/
187	_info file added.	mohor	8105d 12h	/
186	Macro for testbench (DO file).	mohor	8105d 12h	/
185	Directory keeper.	mohor	8105d 12h	/
184	Modelsim simulation environment should be ready now.	mohor	8105d 12h	/