OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 239

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7873d 00h /
238 Defines fixed to use generic RAM by default. mohor 7885d 04h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7887d 10h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7887d 10h /
235 rev 4. mohor 7888d 00h /
234 Figure list assed to the revision 3. mohor 7888d 08h /
233 Revision 0.3 released. Some figures added. mohor 7888d 09h /
232 fpga define added. mohor 7893d 04h /
231 Description of Core Modules added (figure). mohor 7895d 05h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7899d 02h /
229 case changed to casex. mohor 7899d 02h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7899d 05h /
227 Changed BIST scan signals. tadejm 7899d 05h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7899d 07h /
225 Some minor changes. tadejm 7899d 07h /
224 Signals for a wave window in Modelsim. tadejm 7899d 08h /
223 Some code changed due to bug fixes. tadejm 7899d 08h /
222 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7903d 06h /
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7903d 06h /
220 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7906d 07h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.