URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 240

Rev	Log message	Author	Age	Path
240	All modules are reset with wb_rst instead of the r_Rst. Exception is MII module.	tadejm	8021d 21h	/
239	RxError is not generated when small frame reception is enabled and small frames are received.	tadejm	8021d 21h	/
238	Defines fixed to use generic RAM by default.	mohor	8034d 01h	/
237	This commit was manufactured by cvs2svn to create tag 'rel_9'.		8036d 07h	/
236	State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery.	mohor	8036d 07h	/
235	rev 4.	mohor	8036d 21h	/
234	Figure list assed to the revision 3.	mohor	8037d 05h	/
233	Revision 0.3 released. Some figures added.	mohor	8037d 06h	/
232	fpga define added.	mohor	8042d 01h	/
231	Description of Core Modules added (figure).	mohor	8044d 02h	/
230	This commit was manufactured by cvs2svn to create tag 'rel_8'.		8047d 23h	/
229	case changed to casex.	mohor	8047d 23h	/
228	This commit was manufactured by cvs2svn to create tag 'rel_7'.		8048d 02h	/
227	Changed BIST scan signals.	tadejm	8048d 02h	/
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	8048d 04h	/
225	Some minor changes.	tadejm	8048d 04h	/
224	Signals for a wave window in Modelsim.	tadejm	8048d 05h	/
223	Some code changed due to bug fixes.	tadejm	8048d 05h	/
222	This commit was manufactured by cvs2svn to create tag 'rel_6'.		8052d 03h	/
221	TxStatus is written after last access to the TX fifo is finished (in case of abort or retry). TxDone is fixed.	mohor	8052d 03h	/