URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 241

Rev	Log message	Author	Age	Path
241	StartIdle state changed (not important the size of the packet). StartData1 activates only while ByteCnt is smaller than the MaxFrame.	tadejm	8155d 22h	/
240	All modules are reset with wb_rst instead of the r_Rst. Exception is MII module.	tadejm	8155d 22h	/
239	RxError is not generated when small frame reception is enabled and small frames are received.	tadejm	8155d 22h	/
238	Defines fixed to use generic RAM by default.	mohor	8168d 02h	/
237	This commit was manufactured by cvs2svn to create tag 'rel_9'.		8170d 08h	/
236	State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery.	mohor	8170d 08h	/
235	rev 4.	mohor	8170d 22h	/
234	Figure list assed to the revision 3.	mohor	8171d 06h	/
233	Revision 0.3 released. Some figures added.	mohor	8171d 07h	/
232	fpga define added.	mohor	8176d 02h	/
231	Description of Core Modules added (figure).	mohor	8178d 03h	/
230	This commit was manufactured by cvs2svn to create tag 'rel_8'.		8182d 00h	/
229	case changed to casex.	mohor	8182d 00h	/
228	This commit was manufactured by cvs2svn to create tag 'rel_7'.		8182d 03h	/
227	Changed BIST scan signals.	tadejm	8182d 03h	/
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	8182d 05h	/
225	Some minor changes.	tadejm	8182d 05h	/
224	Signals for a wave window in Modelsim.	tadejm	8182d 06h	/
223	Some code changed due to bug fixes.	tadejm	8182d 06h	/
222	This commit was manufactured by cvs2svn to create tag 'rel_6'.		8186d 04h	/