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Rev Log message Author Age Path
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7926d 13h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7926d 13h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7926d 13h /
238 Defines fixed to use generic RAM by default. mohor 7938d 17h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7940d 23h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7940d 23h /
235 rev 4. mohor 7941d 13h /
234 Figure list assed to the revision 3. mohor 7941d 22h /
233 Revision 0.3 released. Some figures added. mohor 7941d 22h /
232 fpga define added. mohor 7946d 17h /
231 Description of Core Modules added (figure). mohor 7948d 18h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7952d 15h /
229 case changed to casex. mohor 7952d 15h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7952d 19h /
227 Changed BIST scan signals. tadejm 7952d 19h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7952d 20h /
225 Some minor changes. tadejm 7952d 20h /
224 Signals for a wave window in Modelsim. tadejm 7952d 22h /
223 Some code changed due to bug fixes. tadejm 7952d 22h /
222 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7956d 20h /

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