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Rev Log message Author Age Path
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 8097d 09h /
243 Late collision is not reported any more. tadejm 8097d 15h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 8098d 05h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 8098d 05h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 8098d 05h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 8098d 06h /
238 Defines fixed to use generic RAM by default. mohor 8110d 10h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 8112d 15h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 8112d 15h /
235 rev 4. mohor 8113d 06h /
234 Figure list assed to the revision 3. mohor 8113d 14h /
233 Revision 0.3 released. Some figures added. mohor 8113d 14h /
232 fpga define added. mohor 8118d 09h /
231 Description of Core Modules added (figure). mohor 8120d 10h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 8124d 07h /
229 case changed to casex. mohor 8124d 07h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 8124d 11h /
227 Changed BIST scan signals. tadejm 8124d 11h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 8124d 12h /
225 Some minor changes. tadejm 8124d 12h /

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