OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 366

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
366 Readded eth_top.v with a deprecation warning olof 4854d 11h /
365 Whitespace cleanup olof 4855d 11h /
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4856d 08h /
363 quartus project files unneback 4856d 17h /
362 added Makefiles to build project unneback 4856d 17h /
361 created branch unneback unneback 4856d 17h /
360 Added partial implementation of the debug register from ORPSoC olof 4857d 16h /
359 Verilator linting fixes olof 4859d 18h /
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4861d 08h /
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4861d 08h /
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4861d 10h /
355 Import Julius Baxter's verilator hints from ORPSoC olof 4861d 11h /
354 Whitespace cleanup olof 4861d 11h /
353 Inherit fixes for bit width of constants from ORPSoC olof 4863d 13h /
352 Removed delayed assignments from rtl code olof 4867d 18h /
351 Turn defines into parameters in eth_cop olof 4876d 08h /
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4876d 09h /
349 Make all parameters configurable from top level olof 4877d 10h /
348 Added option to dump VCD files olof 4878d 09h /
347 Added information about running with Icarus Verilog olof 4878d 09h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.