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15 The previous experimental implemenation for 10Gb/s links has been replaced with the
new, rewritten implementation, which uses sequential numbering of packets instaed
of "sets of packets". This allowed to simplify the driver, and improve its performance.
Additionally a possibility to send user defined commands to the FPGA was added.		 wzab 3869d 21h /
14 Removed small mistake causing a combinatorial loop. wzab 3874d 23h /
13 Small correction in the kernel driver wzab 3877d 05h /
12 Added experimental version of my protocol, working with the 10Gb/s
link on the KC705 board.
The design has been initially tested, and is working, but it still
needs some improvments.
Please note, that this version uses the "jumbo" frames,
with 8192 bytes of user data in each packet (plus header).
Therefore it was necessary to make some changes in the kernel
driver.		 wzab 3884d 01h /
11 Corrected small bug in eth_sender8 (which in fact should only
generate a compiler warning, as the resulting bit vector
was anyway correctly truncated...)		 wzab 4040d 23h /
10 Updated test client program - receiver2.c

Added possibility to activate only selected slave in the command line.
Currently program services up to three slaves: 0, 1 and 2
To activate a slave, add its number as a program argument in the command line
(order doesn't matter).		 wzab 4340d 21h /
9 Corrected serious bug in acknowledged packed number calculations, which lead to transmission
errors in high speed CPUs.		 wzab 4341d 21h /
8 Adjusted parameters of the NCA (network congestion avoidance) alogorithm
to obtain higher throughput.		 wzab 4345d 22h /
7 Shortened synchronization path for tx_start signal in the eth_sender blocks wzab 4346d 01h /
6 Further adjusted IFG lengths wzab 4346d 07h /
5 Decreased length of the intraframe gaps (IFG)
In 100Mb/s version - to 100bits (25 nibbles)
In 1Gb/s version - to 104bits (13 bytes)		 wzab 4346d 22h /
4 Added lacking files PCK_CRC32_D4.vhd and PCK_CRC32_D8.vhd wzab 4373d 06h /
3 Added new version of the FPGA firmware, which does not rely on the Ethernet MAC core.
Now both versions are available.
The version with Ethernet MAC is in directory FPGA_with_MAC.
The version which handles directly Ethernet PHY is in directory FPGA_no_MAC		 wzab 4373d 07h /
2 Initial submission of the implementation of the "fade" protocol. wzab 4530d 00h /
1 The project and the structure was created root 4530d 03h /

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