URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 10

Rev	Log message	Author	Age	Path
10	Created new directory structure. Added Verilog version.	rherveille	8828d 23h	/
9	Created directory structure (documentation, vhdl, verilog)	rherveille	8898d 18h	/
8	Created directory structure (documentation, vhdl, verilog)	rherveille	8898d 18h	/
7	added some remarks, fixed some sensitivity lists	rherveille	8967d 21h	/
6	fixed typo txt -> txr	rherveille	8972d 00h	/
5	fixed an incomplete sensitivity list on assign_dato process	rherveille	8978d 22h	/
4	WISHBONE I2C Master Core: initial release	rherveille	9031d 02h	/
3	This commit was manufactured by cvs2svn to create tag 'first'.		9093d 01h	/
2	initial release	rherveille	9093d 01h	/
1	Standard project directories initialized by cvs2svn.		9093d 01h	/