URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 75

Rev	Log message	Author	Age	Path
75	Fixed sSDA generation	rherveille	5290d 20h	/
74	Added SCL/SDA line filter	rherveille	5429d 16h	/
73	Fixed double wishbone write in a single access	rherveille	5429d 16h	/
72	Fixed AL generation Added median filter on SDA and SCL inputs	rherveille	5429d 17h	/
71	Fixed double wishbone write in a single access	rherveille	5429d 17h	/
70	Added old uploaded documents to new repository.	root	5737d 19h	/
69	Added old uploaded documents to new repository.	root	5738d 10h	/
68	New directory structure.	root	5738d 10h	/
67	Fixed slave_wait clocked event syntax	rherveille	5771d 13h	/
66	Fixed type iscl_oen instead of scl_oen	rherveille	5786d 12h	/
65	Changed wb_adr_i from unsigned to std_logic_vector	rherveille	5786d 22h	/
64	Added SCL clock synchronization logic Fixed slave_wait signal generation	rherveille	5786d 22h	/
63	Added clock synchronization logic Fixed slave_wait signal	rherveille	5786d 23h	/
62	Fixed synopsys miss spell (synopsis) Fixed cr[0] register width Fixed ! usage instead of ~ Fixed bit controller parameter width to 18bits	rherveille	5787d 12h	/
61	Removed synopsys link; it's not used	rherveille	6442d 00h	/
60	Added missing semicolons ';' on endif	rherveille	6618d 21h	/
59	fixed short scl high pulse after clock stretch	rherveille	6623d 22h	/
58	fixed (n)ack generation	rherveille	6656d 00h	/
57	fixed short scl high pulse after clock stretch fixed slave model not returning correct '(n)ack' signal	rherveille	6656d 00h	/
56	Fixed Tsu:sta timing check. Added Thd:sta timing check.	rherveille	7208d 21h	/