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Rev Log message Author Age Path
181 Bug fix: left out a link script in last commit ja_rd 4907d 17h /
180 Removed old support code
Bits of it may yet reappear as part of the new support library		 ja_rd 4908d 04h /
179 'Adventure' demo updated, removed dependencies to old support code ja_rd 4908d 04h /
178 Added FP math support to support library
Uses code lifted from old version of GNU libc, no adaptation needed
NEEDS testing!		 ja_rd 4908d 04h /
177 Modified 'Adventure' demo to use new support code ja_rd 4908d 04h /
176 Modified 'hello' to use new support code
NOTE: the 'OPCODE EMULATOR' mentioned below is the TRAP HANDLER
The SW opcode emulation has been working for months		 ja_rd 4908d 04h /
175 Updated support library
Removed spurious dependence to accursed '_impure_ptr'		 ja_rd 4908d 04h /
174 started to add branch emulation to opcode emulator ja_rd 4908d 05h /
173 New version of support code, still incomplete. ja_rd 4908d 05h /
172 Added new version of support code, still incomplete ja_rd 4909d 19h /
171 CPU bug fix: MFC0 instructions aborted by privilege trap should not modify any register ja_rd 4910d 22h /
170 Fixed bug in optional emulation of EXT, INS ja_rd 4911d 08h /
169 Fixed bug in emulation of CLO instruction
Added support for simulated hardware IRQs (incomplete)		 ja_rd 4911d 08h /
168 Updated 'opcodes' simulation script to NOT use simulated mips32 instructions and trap instead (as the real CPU does) ja_rd 4911d 08h /
167 Updated simulation script for 'hello' sample: now uses function call log.
It is useless in this demo, but it shows how to use it.		 ja_rd 4911d 09h /
166 Modified simulator, added some debug functionality:
- Optional emulation of some MIPS32r2 opcodes
- Function call trace log using map file (crude implementation)

Plus a few small bug fixes		 ja_rd 4911d 09h /
165 Added (very early draft, very incomplete) reserved opcode trap handler.
Updated opcode tester to test some emulated mips32 opcodes using the trap handler.		 ja_rd 4916d 18h /
164 Minor typo fixes in source file ja_rd 4916d 18h /
163 SW simulator update:
Better disassembly format (hastily tested)
New parameters: start address, breakpoint address, whether or not to trap reserved opcodes		 ja_rd 4916d 19h /
162 Fixed stupid mistake in headers (date of project) ja_rd 4917d 10h /

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