OpenCores
URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] - Rev 190

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
190 VHDL object code builder script updated
Now can insert project name into target file
ja_rd 4871d 15h /
189 fixed opcode test makefile: adapted to new common makefile ja_rd 4879d 13h /
188 updated hello demo mpu file ja_rd 4880d 08h /
187 Fixed SW simulator: reset value for timer prescaler ja_rd 4903d 21h /
186 Updated the SW simulator:
Fixed handling of KU/IE flags
Added preliminary support for simulated HW interrupts
Added preliminary support for timer/counter
Enlarged the BRAM in all memory maps (to be undone)
ja_rd 4903d 21h /
185 FIX: committed forgotten source file for 'memtest' demo...
Updated memtest makefile
ja_rd 4906d 03h /
184 Updated some application makefiles to make use of common makefile ja_rd 4906d 03h /
183 Updated comments and readme file for code samples ja_rd 4907d 19h /
182 Updated makefiles for Hello and Adventure
Removed old dependencies in Adventure demo
ja_rd 4907d 19h /
181 Bug fix: left out a link script in last commit ja_rd 4907d 19h /
180 Removed old support code
Bits of it may yet reappear as part of the new support library
ja_rd 4908d 06h /
179 'Adventure' demo updated, removed dependencies to old support code ja_rd 4908d 06h /
178 Added FP math support to support library
Uses code lifted from old version of GNU libc, no adaptation needed
NEEDS testing!
ja_rd 4908d 06h /
177 Modified 'Adventure' demo to use new support code ja_rd 4908d 07h /
176 Modified 'hello' to use new support code
NOTE: the 'OPCODE EMULATOR' mentioned below is the TRAP HANDLER
The SW opcode emulation has been working for months
ja_rd 4908d 07h /
175 Updated support library
Removed spurious dependence to accursed '_impure_ptr'
ja_rd 4908d 07h /
174 started to add branch emulation to opcode emulator ja_rd 4908d 07h /
173 New version of support code, still incomplete. ja_rd 4908d 07h /
172 Added new version of support code, still incomplete ja_rd 4909d 21h /
171 CPU bug fix: MFC0 instructions aborted by privilege trap should not modify any register ja_rd 4911d 00h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.