OpenCores
URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] - Rev 236

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
236 Added macros to SoC header file for easy access to GPIO registers ja_rd 4345d 04h /
235 Fixed comments in cache module ja_rd 4345d 04h /
234 Added a few GPIO registers to the SoC, updated the DE-1 'top' file to drive the SD interface with the GPIO signals. ja_rd 4345d 04h /
233 Fixed top entity for De-1 demos: Bootstrap BRAM size is now taken from a constant in the obj code package. ja_rd 4363d 16h /
232 Fixed bug in object code package generation.
This bug was causing spurious behaviors in the Hello demo.
ja_rd 4363d 17h /
231 Updated file list ja_rd 4492d 08h /
230 Modelsim script updated to latest HW changes ja_rd 4492d 09h /
229 Code samples updated to use new VHDL config packages and new SoC (UART). ja_rd 4492d 09h /
228 SW simulator updated
Simulation of UART adapted to new hardware.
Added simulation of debug registers.
ja_rd 4492d 09h /
227 Removed modules no longer used:
code_rom_pkg replaced by new package in SoC directory.
RS232 sub-modules replaced by new UART
ja_rd 4492d 09h /
226 Updated demo and test bench to use new SoC entity. ja_rd 4492d 09h /
225 Added utility functions for the initialization of BRAM memories. ja_rd 4492d 09h /
224 MCU entity gutted and transformed into a SoC entity
Different UART, new generics...
ja_rd 4492d 09h /
223 MCU entity renamed to SoC, moved to separate SoC directory ja_rd 4492d 09h /
222 Documentation updated ja_rd 4492d 10h /
221 Documentation updated ja_rd 4492d 10h /
220 New script for configuration package generation.
New directory for all utility scripts
ja_rd 4492d 19h /
219 Added windows binary for MIPS simulator 'slite' to the SVN repo, for convenience. ja_rd 4493d 02h /
218 UART bug fix: rx_rdy flag must be clear only when reading the rx buffer ja_rd 4496d 09h /
217 Removed another SoC file prematurely committed ja_rd 4502d 23h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.