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URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

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Rev Log message Author Age Path
13 Corrections in analyzer to handle TDi and historical bytes in ATR and PPS
todo: handle inverse convention
acapola 5022d 07h /
12 pps sequence added to test bench
endOfTx added to TxCore
acapola 5033d 03h /
11 added BSD licence header to files acapola 5033d 07h /
10 communication direction probe added acapola 5033d 08h /
9 parity convention fixed acapola 5039d 04h /
8 acapola 5041d 03h /
7 - rx/tx use "cyclesPerEtu" input
- "stopBit" status bit timing fixed
- analyzer: "lastByte" and "bytesCnt" functional
acapola 5042d 03h /
6 analyzer added to test bench, not functional yet... acapola 5043d 03h /
5 draft of t=0 protocol analyzer (to ease debuging, and eventually as an ip itself) acapola 5044d 03h /
4 Basic test bench completed for T=0: a card send ATR, reader send a command
TODO: add cycles/ETU management (start at 372, then adjust in case of PPS...)
acapola 5045d 04h /
3 initial draft, not functional yet acapola 5052d 05h /
2 acapola 5052d 06h /
1 The project and the structure was created root 5053d 02h /

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