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URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

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Rev Log message Author Age Path
17 yet another fix of the analyzer: ATR, and convention handling acapola 5113d 13h /
16 just cosmetic acapola 5117d 14h /
15 tpdu level tasks
inverse convention
acapola 5118d 12h /
14 Task to send strings as bytes improved acapola 5121d 12h /
13 Corrections in analyzer to handle TDi and historical bytes in ATR and PPS
todo: handle inverse convention
acapola 5122d 15h /
12 pps sequence added to test bench
endOfTx added to TxCore
acapola 5133d 12h /
11 added BSD licence header to files acapola 5133d 15h /
10 communication direction probe added acapola 5133d 17h /
9 parity convention fixed acapola 5139d 13h /
8 acapola 5141d 12h /
7 - rx/tx use "cyclesPerEtu" input
- "stopBit" status bit timing fixed
- analyzer: "lastByte" and "bytesCnt" functional
acapola 5142d 12h /
6 analyzer added to test bench, not functional yet... acapola 5143d 12h /
5 draft of t=0 protocol analyzer (to ease debuging, and eventually as an ip itself) acapola 5144d 12h /
4 Basic test bench completed for T=0: a card send ATR, reader send a command
TODO: add cycles/ETU management (start at 372, then adjust in case of PPS...)
acapola 5145d 12h /
3 initial draft, not functional yet acapola 5152d 13h /
2 acapola 5152d 15h /
1 The project and the structure was created root 5153d 11h /

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