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URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] - Rev 7

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Rev Log message Author Age Path
7 - rx/tx use "cyclesPerEtu" input
- "stopBit" status bit timing fixed
- analyzer: "lastByte" and "bytesCnt" functional
acapola 5038d 16h /
6 analyzer added to test bench, not functional yet... acapola 5039d 17h /
5 draft of t=0 protocol analyzer (to ease debuging, and eventually as an ip itself) acapola 5040d 17h /
4 Basic test bench completed for T=0: a card send ATR, reader send a command
TODO: add cycles/ETU management (start at 372, then adjust in case of PPS...)
acapola 5041d 17h /
3 initial draft, not functional yet acapola 5048d 18h /
2 acapola 5048d 19h /
1 The project and the structure was created root 5049d 15h /

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